Darshak Sheladiya
Bis 2019, Computer Science (Specialization in Embedded systems), University of Siegen
Siegen, Deutschland
Werdegang
Berufserfahrung von Darshak Sheladiya
8 Monate, Jan. 2017 - Aug. 2017
Intern
DKOP Labs Pvt. Ltd.
I developed a strong working knowledge of VLSI Design, TCL, Verilog HDL, and System Verilog while I focused my efforts to successfully design and simulate SPI module using Verilog HDL
Ausbildung von Darshak Sheladiya
2 Jahre und 3 Monate, Okt. 2017 - Dez. 2019
Computer Science (Specialization in Embedded systems)
University of Siegen
Embedded Systems, FPGA designs, Time-triggered Systems, Data Communication, Pattern recognition.
3 Jahre und 1 Monat, Aug. 2014 - Aug. 2017
Electronics and Communication Engineering
Lovely Professional University
VLSI Design, Embedded Systems, Digital Signal Processing.
3 Jahre und 1 Monat, Juli 2010 - Juli 2013
Electronics and Communication Engineering
Nirma University of Science and Technology
Embedded Systems, VLSI Design.
Sprachen
Englisch
Fließend