Fahad Rahman

In Cadence Virtuoso 6.1.5 Design System using CMOS technology first a Beta-multiplier for biasing was designed and then it was improved using amplifiers and feedback. Then a two stage folded cascade amplifier with a bandwidth of 50MHz was designed. Next using the amplifier a sample and hold structure and an integrator was designed. Then for the purpose of building a two stage sigma delta an inverter, a NAND gate and a clock generator was built for a clock frequency of 3.2MHz.

Fabrication of a TLM and Corbino MESFET on a GaAs substrate. Farbication process included with cleaving, cleaning, oxide etching, aluminum evaporation, resists process, elimination of photoresist, Aluminum etching, Mesa etching, and finally cleaning the wafer creating the ohmic contacts and alloying. After the successful fabrication of the two type of MESFET the I-V characterization, the characterization of the schottky contacts and also the resistance versus distance was also measured.

Preparing test bench for testing multiple VCSEL (Vertical Cavity Surface Emitter Laser) in a single wafer. Using optical power meter to measure the output power of the laser. For communication the test bench was prepared with fiber optic cables, the output power and the bit error rate was measured using BERTScope and the eye diagram was plotted in oscilloscope.

Using an ATMega AVR16 microcontroller from Atmel, a CAN controller and other electronic components an electronic height sensor control was built. Implementation required a PCB design and layout of the circuit using EAGLE PCB design software. After fabrication of the PCB board including different electrical component the board was initially tested. Finally the microcontroller was programmed using C++ programming.