Jiewei Chen
Angestellt, Sr. Process Integration Engineer, Micron Technology, Inc.
Boise, Vereinigte Staaten
Über mich
- 4 years of experience as R&D Process Integration Engineer in the Semiconductor Industry - Ph.D. in Materials Science, Master in Statistics. Extensive research background in thermodynamics, thin films, and strong data analysis skills - Inventor of 2 U.S. Patents and 26 Patents pending (U.S. and China)
Werdegang
Berufserfahrung von Jiewei Chen
Bis heute 2 Jahre und 9 Monate, seit Okt. 2021
Sr. Process Integration Engineer
Micron Technology, Inc.
170s 3D RG NAND Staircase Contact Module Owner
2 Jahre und 7 Monate, Apr. 2019 - Okt. 2021
Engineer - R&D NAND Process IntegrationEngineer
Micron Technology, Inc.
150s 3D RG NAND Replacement Gate Module Owner
3 Monate, Juli 2018 - Sep. 2018
Intern, Wet Process Non-Volatile Memory
Micron Technology, Inc.
Designed and performed fundamental electrochemistry research to optimize wet process flow for source corrosion issue
Ausbildung von Jiewei Chen
2 Jahre und 2 Monate, Okt. 2016 - Nov. 2018
MSc., Statistics
University of California, Davis
Grade: 3.96/4.0
4 Jahre und 3 Monate, Okt. 2014 - Dez. 2018
Ph.D., Materials Science
University of California, Davis
Supervisor: Professor Alexandra Navrotsky Thesis: “Energetics and Structures of Solid Phases in Silicon - Oxygen - Carbon - Nitrogen Low-k Dielectric Materials” Full responsibility for a 4-year collaborative project with Intel Corporation, including designing and executing experiments, data analysis and scientific model validation.
3 Jahre und 11 Monate, Sep. 2010 - Juli 2014
Bachelor of Engineering (B.Eng.), Polymer Materials & Engineering
Zhejiang University
Grade: 3.83/4 Chu Kochen Honors Degree (top 5%)