Jose Cubero
Angestellt, PhD Student and Research Assistant, RWTH Aachen University
Abschluss: Msc., TU Kaiserslautern,Germany & University of Southampton, UK
Köln, Deutschland
Werdegang
Berufserfahrung von Jose Cubero
Bis heute 3 Jahre und 4 Monate, seit März 2021
PhD Student and Research Assistant
RWTH Aachen UniversityPhD Student and Research Assistant at the Institute for Communication Technologies and Embedded Systems, RWTH Aachen University
Delivering solutions for next generation ADAS systems. SoC architecture, System Engineering. * Creation of HW and SW concepts * Modelling and analysis of system timing, DDR bandwidth and power consumption. * Optimization of SoC architecture: bus, inter-module synchronization and caches. * Development of proof-of-concept applications and benchmarks. * Support on the conceptualization and assesment of safety mechanisms (ISO-26262). * 3rd party management for outsourcing. * Level 2 customer support.
1 Jahr und 5 Monate, Juli 2014 - Nov. 2015
SW Engineer
GETRAG FORD Transmissions GmbH, Köln
Automotive SW Integration and Testing for Dual Clutch Transmission systems (DCTs) Main duties: * Integration from diverse SW components for an ECU application. * SW release and version control management. * Execution of Integration tests in a Hardware in the Loop setting. * Support for extending the test automation environment. Perl, Python, Windows Batch. * Debugging and analysis of integration issues and SW failures. * HW resource consumption analysis. CPU Load, Stack and Memory use.
Post-silicon functional test generation: * Design of functional test cases, focus on the cache coherence system. * Implementation and RTL simulation of functional tests in IA32 Assembler. * Physical fault and functional coverage analysis (Fault Grading). * Development of scripts for automatic test generation.
Ausbildung von Jose Cubero
2 Jahre und 8 Monate, Aug. 2011 - März 2014
Embedded Systems
TU Kaiserslautern,Germany & University of Southampton, UK
System on Chip Design HW/SW co-design Virtual Platforms Embedded Linux FPGA and ASIC design
5 Jahre, Jan. 2005 - Dez. 2009
Electrical Engineering
Universidad de Costa Rica
computer architecture, hardware development, micro-controllers, control systems.
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Englisch
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