Marc Swinnen

Azuro is a software startup that sells design tools to chip designers at top-10 semiconductor vendors, mainly to low-power mobile telecom and cell phone design teams. Customers include Intel, Samsung, Toshiba, Texas Instruments and others. Azuro’s business is a high-price low-volume model with a typical deal size on the order of several hundred thousand dollars. I am responsible for all marketing at Azuro and report directly to the CEO.

I managed the marketing of Synopsys’ latest major product – IC Compiler (IC place & route software - EDA). Before that I headed the marketing team for the Astro/Apollo products now being replaced by IC Compiler. These products have been top-performers for Synopsys with annual revenues of well over $100 million. My responsibilities covered general product management, internal/external messaging, and competitive positioning.

Moved to Paris to help set up the Sequence Sales office in Europe – specifically to support international Sales and build up and manage the European applications engineering group. Started from scratch to hire and train 2 Applications Engineers based in the UK and France.

Joined the Deep Sub-Micron Physical Design Marketing group as the Product Marketing Manager for the ‘DesignPlanner’ (DP) floorplanning products (Physical Design Planner & Logical Design Planner). My product line accounted for $6M per quarter. We implemented a distribution deal with Toshiba to include DP in their ASIC design kits. I also worked with the Engineering Team developing Cadence’s physical synthesis offering (PKS) in its early stages.

Responsible for all Marketing aspects of selling SVR’s Place-&-Route tools. This included Corporate Marketing, Press Relations, MarComm, Technical Marketing and Product Marketing. I managed a group of 3 people. Oversaw a major product rollout for a new variable die-size area router and organized the entire DAC trade show event. Worked as an AE manager to set up 3 Sales and Support offices on the East coast of the US. Also lived in Munich for 4 months to set-up and train a new distributor.

Chip Design