Ranjit Menon

Angestellt, Senior Engineer-Semiconductors-Back end IC Physical Desgn, Confidential

Penang, Malaysia

Fähigkeiten und Kenntnisse

IC Layout
PDK
Analog
DRC
LVS
ERC
Antenna Check
Test Chip
Layout Integration
Cadence Virtuoso
VLE
VXL
Calibre
Hercules
Cadence PVS
Calibre RVE
Cadence SKILL
PERL
bash
TcL
PD CAD
IC Compiler
PCBs
Engineering

Werdegang

Berufserfahrung von Ranjit Menon

  • Bis heute 20 Jahre und 5 Monate, seit Feb. 2004

    Senior Engineer-Semiconductors-Back end IC Physical Desgn

    Confidential

  • Physical Design/SoC level,PDK,Layout Design(Standard Cells,AMS):13 Years in VLSI

    Semiconductor Industry

Sprachen

  • Englisch

    -

  • Japanisch

    -

  • Französisch

    -

Interessen

Science & Technology Documentaries

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