Thomas Klein
Angestellt, FPGA Entwickler, DSI GmbH
Braunschweig, Deutschland
Werdegang
Berufserfahrung von Thomas Klein
Bis heute 7 Jahre und 11 Monate, seit Juli 2016
FPGA Entwickler
DSI GmbH
Verification team lead. Mentoring, verification automation, flow development, test plan creation, implementation and debug. Working on ESA aerospace projects for environment monitoring.
8 Monate, Feb. 2015 - Sep. 2015
FPGA Design Engineer
PLC2
FPGA Design with Xilinx chips Training and Support for Xilinx Customers
3 Jahre und 7 Monate, Juni 2011 - Dez. 2014
Validation & Emulation Engineer
Intel
Build and bring-up of emulation models for SoC designs on Mentor Veloce D1/D2 platform. Development and integration of emulation collateral (trackers, xactors). Customer support and training on emulation tool usage. Emulation model build flow enhancements. Platform specific design optimization for improved emulation resource usage.
5 Jahre und 2 Monate, Apr. 2006 - Mai 2011
Component Design Engineer
Intel
RTL design for a new IA processor: Behavioral and structural RTL coding of Integer Unit components; Low-level test code. Pre-Silicon validation of Intel architecture features (VT) and debug interfaces (PDM) on modern x86 processors (Core i3/5/7): Test plan writing, test implementation, cluster and full-chip simulations, bucketing, failure analysis (RTL, Microcode, tools, environment), bug fix proposals. Post-Silicon validation of 10G interface of optical networking chip. Thermal chip testing.
Jun 2004 - Nov 2004: Working for Intel GmbH, Braunschweig - Extension of an FPGA design for testing of a telecommunication ASIC: 10 GBit/s PRBS generator and checker. Dec 2004 - Jan 2006: Working for MTU Aero Engines AG, Munich - Development and test of an electronic avionic device (EPMU): Prototype assembly; HW and SW interface component tests. Feb 2006 - Mar 2006: Working for BHTC, Lipstadt - Test automation for automobile thermal and ventilation air control devices.
3 Monate, Dez. 2003 - Feb. 2004
WHK
RWTH Aachen University (EECS)
Implementation of digital FIR filters for Altera FPGAs
3 Monate, Mai 2001 - Juli 2001
Praktikant
Toshiba Electronics Europe GmbH (ELDEC)
Migration of parts of an ASIC design (DCDA controller) into a Xilinx FPGA for prototyping.
Ausbildung von Thomas Klein
13 Jahre, Okt. 1990 - Sep. 2003
Elektrotechnik (Nachrichtentechnik)
RWTH Aachen
Sprachen
Deutsch
Muttersprache
Englisch
Fließend
Russisch
Grundlagen
Französisch
Grundlagen