Suprajith Suresh Hakathur

I work for Circuit and Systems Department. I work on RISC-V platforms to design and develop fault-tolerant processors. I use Synopsys and Cadence EDA tools like Synopsys Design Compiler and Cadence Innovus. This job requires RTL Modelling for which I use SystemVerilog. The job requires scripting using Python and TCL.

I used to work as a CAN verification engineer for Vehicle Dynamics (VED) business unit of Continental Automotives. As part of VED, I was trained on various automotive specific technologies: CAN, Flexray, ABS, ESC, Automotive Safety etc.

VLSI, Embedded Systems, Digital Design, Analog and Digital Communication, Information Theory and Coding, Digital Signal Processing, Image Processing, HDLs, Computer Networks etc